Complementary metal-oxide-semiconductor (CMOS) technology is quickly developing into the sub-micrometer regime and allows for constructing integrated circuits having more and more functional units on an increasingly smaller area. Along with miniaturization progressing to thinner semiconductor structures, like thinner gate oxides, the integrated circuits become prone to damage by electrostatic discharge (ESD), e.g. as oxide breakdown voltages are low. ESD protection devices have to keep pace with the CMOS development and are required to provide trigger voltages which give protection at levels close to the semiconductor's junction breakdown voltages. This is a goal not easy to be reached.
Stacked diodes have been proposed to set the trigger voltage to lower values than the junction breakdown and prevent leakage current. Stacked diodes have a high leakage current and active protection suffers from false triggering in noisy environment. ESD protections circuits with operational voltages of less than 1.8V, however, cannot use a junction breakdown to trigger ESD protection. Either active clamps or stacked diodes are used instead to clamp the ESD voltage.
Diode triggered ESD protections consist of a trigger device, a discharge device and a pull-off circuit to prevent leakage current. The internal resistance of the discharge device often is rather high and results in an increased clamp voltage, which is proportional to the product of ESD current and internal resistance. Increasing the size of the discharge device, however, is area consuming and costly.